GPIOmodule
General Purpose Input/Output Module
The GPIOmodule is a general purpose input/output controller, offering some unique features that eases system integration and use.
Each GPIO port can be configured for input, output or bypass mode. Output data can be set in one access or single or multiples bits can be set or cleared. Every GPIO port can serve as an interrupt source and has its own configuration options:
- Level sensitive, single edge triggered or level change
- Active high or low respectively rising edge or falling edge
- Individual interrupt enable register and status flags
An industry standard AMBA APB host interface simplifies system embedding. An AXI Lite host interface is available on request.
Block Diagram
Features
- Up to 32 ports
- Each port can be input, output or bypass
- Data set or bitwise set and clear control
- Input data synchronization
- Flexible interrupt generation for each GPIO pin
- Industry standard AMBA APB host interface
- Full synchronous design
- Technology independent, vendor independent
Implementation Options
Following synthesis options are available using top-level generics:
- APB bus width (8/16/32 bit)
- Number of ports
- CPU readback enable
Deliverables
- VHDL source code
- Simulation testbench
- Timing constraints file
- Synthesis script
- User Guide
Datasheet
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