|
Standard CAN controllers only provide functions for the main traffic, it is difficult to use them for CAN analyzer tools. For such purposes, INICORE provides a FPGA which is able to trace the whole CAN protocol on a bit level.
For high bitrates, the CANaccess provides a FIFO interface, where the needed information is stored and read then by the microprocessor. In slower cases, all that may directly be done by interrupt on each bit on the CAN bus. And - by the way: CANaccess is also a fully working CAN2.0B! Build your next generation CAN analyser tool with CANaccess and talk with us about new ideas on CAN. Future products will have internal memory and will use DMA transfer.
Block Diagram
|
 |
Features:
CAN 2.0B, up to 1Mbit/s
Trace Capability on Bit Level
MC683xx Compatible Interface (300 ns)
Access to All Internal Status, Error Counters, Frame Reference, TX and RX Bus, Internally and Externally Available (FIFO Interface)
Interrupt for All Errors, Message Traffic, Receiver Overrun
Fully Synchronous Design
Adaptable to Your Needs
FPGA Samples Available Now!
|